Research Projects - LEES Plus
LEES Plus
Heteroepitaxy
The key to creating a new innovative path in the integrated circuit industry is the ability to deposit thin films of high quality on dissimilar substrates. In this research, we will be depositing III-V materials on silicon substrates, sometimes depositing SiGe as an intermediary. The arsenides, the phosphides, and the nitrides will be explored, and the goal of this program is to both advance the state of the art as well as move heteroepitaxy onto large 200 mm silicon wafers.
III-V and Silicon CMOS Process Integration
Although successful research in heteroepitaxy may mate III-V’s with silicon in a successful manner, the way in which the materials are deposited and the sequence in which they are deposited with respect to silicon CMOS processing determines the utility of integrated circuits based on this new materials platform. LEES aims to develop process integration techniques that will have minimal changes to the existing foundry processes, so that CMOS circuit devices' digital and analog performance stay within the original specification.
III-V/Si Devices
The goals of the projects in this theme are oriented towards creating state-of-the-art III-V devices on silicon and using that progress to combine III-V devices with silicon CMOS in a monolithic process flow. The device platforms to be explored are GaN and InGaAs HEMTs as well as GaN/ InGaP LEDs.
Circuit Design
The goal of LEES is to create an III-V/Si CMOS flow that allows circuit designers to build unique circuit designs that could not have been done with a silicon CMOS platform alone. Circuit designers in this research theme will have an opportunity to design the world’s first monolithic III-V/Si CMOS electronic and optoelectronic circuits.
Energy and Thermal Management
As we succeed in our IRG vision, it would be timely to look into thermal management and energy storage and generation for these mobile ICs. This theme will investigate methods of creating integrated batteries and supercapacitors within silicon systems as well as work on methods for fabricating devices and solutions within silicon that can minimize the thermal management problems associated with highly integrated low-energy electronic systems.